The invention herein relates to construction of monolithic integrated circuits having component devices therein which are to have very small geometries and wherein an element in a component device requires independent dopant provision steps to provide an optimum device element while simultaneously providing desirable elements in other and different component devices in the monolithic circuit. More particularly, the invention is related to bipolar transistor construction in monolithic integrated circuits and the associated components constructed therewith in the monolithic circuits such as integrated resistors.
Monolithic integrated circuits which are to perform a large number of circuit functions while meeting substantial performance standards require electronic component devices which are capable of as rapid operation as is possible and which have as small a geometrical layout as is possible. These requirements are quite compatible in that a small geometrical layout tends to be required for rapid operation of electronic component devices. The electronic component devices must also be provided simultaneously with other circuit component devices to form the monolithic integrated circuit, particularly, provided simultaneously with integrated resistors.
There are numerous difficulties in achieving these goals for electronic component devices in monolithic integrated circuits. First, the electronic component devices in the monolithic integrated circuit have often been made in the past with a series of masking steps which expose selected portions of the underlying integrated circuit material, usually silicon, for various processing steps to be performed at such exposed regions. Most often, these processing steps are diffusion, ion implantation and deposition. The use of a multiplicity of masks gives rise to relatively large tolerance requirements for the exposed portions because of cumulative mask and mask alignment tolerances leading to unduly large component device layouts. Mask alignment tolerances are required because of the failure to accurately align each mask in this series of masks with respect to one another and the underlying silicon during the series of processing steps.
In constructing bipolar transistors as electronic component devices in a monolithic integrated circuit, the performance of the transistor is determined essentially by the base geometry and resistivity, both of which are to vary depending on the position in the base region of the transistor for optimum performance. Yet these requirements for constructing an optimum base region are at some variance with the requirements for making integrated resistors which are often also constructed in an integrated circuit in conjunction with the construction of the base region. Further, the provision of the emitter region in the bipolar transistor can lead to base push-out. In a bipolar transistor of a small geometry, problems can also result from a spike of the emitter region passing through the base or a spike from the emitter contact passing through the emitter, these spikes leading to electrical shorts. These and other problems make the provision of such electronic component devices, those devices which have the desired small geometries and rapid operation capability, a difficult undertaking.